1. Field of the Invention
The present invention relates to a display device, and more particularly to a source driving circuit of a display device and a source driving method thereof.
2. Description of the Related Art
Compared with a cathode ray tube (CRT), a liquid crystal display (LCD) device is thin and has less weight with improved image quality. LCD devices are widely used for information processing devices such as laptop computers.
An active matrix LCD (AM LCD) device includes a plurality of active elements connected to pixel electrodes. The pixel electrodes are arranged in a matrix format. The AM LCD device has a higher contrast ratio than that of a passive matrix LCD device. Accordingly, the active matrix driving is used in color LCD devices. In AM LCD devices, thin film transistors (TFTs) are widely used as the active elements connected to the pixel electrodes.
FIG. 1 is a block diagram of a conventional AM LCD device, which is disclosed in Korean Patent Laid-Open Publication No. 10-2004-0077016. Referring to FIG. 1, the conventional AM LCD device includes a controller 100, a gate driving circuit 200, a source driving circuit 300, a liquid crystal panel 400, and a gray scale voltage generator 500.
The liquid crystal panel 400 includes TFTs located at the intersection of each row and column of the matrix. The TFT has a source receiving a source signal (or “data signal”) and a gate receiving a gate signal (or “scan signal”). A storage capacitor CST and a liquid crystal capacitor CLC are connected between a drain of the TFT and a common voltage VCOM. The liquid crystal panel 400 receives the gate signals through gate lines G1 to Gn, and the source signals through source lines D1 to Dm, respectively. The gate driving circuit 200 produces the gate signals by combining a gate-on voltage Von and a gate-off voltage Voff, and applies the gate signals to the gate lines G1 to Gn.
The gray scale voltage generator 500 generates positive and negative gray scale voltages GMA associated with the brightness controls of the LCD device.
The source driving circuit 300 performs a digital-to-analog (D/A) conversion on video data DATA received from the controller 100 using the gray scale voltages GMA outputted from the gray scale voltage generator 500, and applies the converted data to the source lines D1 to Dm.
The controller 100 receives RGB video signals R, G and B and control signals, such as a vertical sync signal Vsync, a horizontal sync signal Hsync, a main clock signal MCLK, a data enable signal DE, and so on. Based on the control signals, the controller 100 generates source control signals CONT1 and gate control signals CONT2, and processes the RGB video signals R, G and B to meet the proper operating conditions of the liquid crystal panel 400. Then, the controller 100 transmits the gate control signals CONT2 to the gate driving circuit 200, and transmits the source control signals CONT1 and the video data DATA to the source driving circuit 300.
The gate driving circuit 200 and the source driving circuit 300 include a plurality of gate drive integrated circuits (ICs) (not shown) and a plurality of source drive ICs (not shown), respectively. The source driving circuit 300 applies the source signals to the source lines arranged on the liquid crystal panel 400, and the gate driving circuit 200 applies the gate signals to the gate lines arranged on the liquid crystal panel 400.
FIG. 2 is a block diagram of a source driving circuit of an LCD device. As shown in FIG. 2, the source driving circuit includes ten source drive ICs 310, 320, 330, 340, 350, 360, 370, 380, 390 and 395. Each of the source drive ICs receives video data DATA, gray scale voltage GMA, and control signals DIO, CLK and TP. The control signal DIO is an I/O control signal representing a data input/output direction in the source drive IC; data is inputted to a left side of the source drive IC and outputted through a right side thereof in response to the control signal DIO, and vice versa. The control signal CLK is a clock signal used in the source drive IC. The control signal TP is a load signal determining whether the data DATA of the source drive IC is to be output.
FIG. 3 is a block diagram of one source drive IC (for example, 310) of the source driving circuit illustrated in FIG. 2. Referring to FIG. 3, the source drive IC 310 includes a shift register 311, a data latch circuit 313, a D/A converter 315, and an output buffer 317. The shift register 311 receives the clock signal CLK with a predetermined frequency and the I/O control signal DIO, and it generates a pulse signal at every time interval of a predetermined number of clock signals. The data latch circuit 313 receives the data DATA and the load signal TP from the controller 100 of FIG. 1. The data latch circuit 313 latches the data DATA according to the shift order of the shift register 311 and outputs the latched data DATA when the load signal TP is applied thereto.
The D/A converter 315 receives the gray scale voltage GMA from the gray scale voltage generator 500 of FIG. 1 and generates analog voltage signals S1 to S414 in response to the output signals D1 to D414 of the data latch circuit 313. The analog voltage signals S1 to S414 are applied to the output buffer 317. The output buffer 317 outputs signals Y1 to Y414 to the source lines according to the order of the data DATA applied to the data latch circuit 313.
As shown in FIG. 3, the source drive IC 310 outputs 414 source signals Y1 to Y414. The shift register 311 is a 138-bit register and the data latch circuit 313 has 414 (138×3=414) channels with respect to the video signals R, G and B.
The conventional source drive IC illustrated in FIG. 3 uses the 138-bit shift register 311 to output 414 source signals, and 414 data are simultaneously converted into the analog signals in response to the load signal TP received from the timing controller 100 of FIG. 1. In the conventional source driving circuit with the source drive ICs of FIG. 3, the circuit size of the D/A converter 315 is large and the layout area is large when it is implemented as the semiconductor IC. In addition, the conventional source driving circuit consumes a large amount of power. It would be desirable that a source driving circuit of an LCD device be capable of generating the source signals Y1 to Y414 with low power consumption.